Flashkeeper FPGA SoM
devboard/flashkeeper/som (platform)
| Property | Description |
|---|---|
| Manufacturer | Flashkeeper |
| Model | FPGA SoM |
| Year | 2026 |
| Max CPU | 12 MHz Integrated PicoRV32 Default soft core for Flashkeeper firmware - can be replaced by user bitstream |
| Max RAM | 128 KB On-chip iCE40 PSRAM |
| Image | The Flashkeeper FPGA SoM (https://flashkeeper.org/images/som.jpg) |
| Software: User-Facing Environment | Free (EDE) |
| Software: Operating System | Free (Flashkeeper FPGA Firmware) |
| Software: Bootloader/Recovery | Not Present |
| Firmware: Trusted Execution Environment (e.g. x86 SMM) | Not Present |
| Firmware: Late Boot/Payload | Not Present |
| Firmware: Platform Initialization | Free |
| Firmware: Graphics Initialization | Not Present |
| Firmware: Memory Initialization | Free |
| Firmware: Early Boot (incl. RoT) | Free (fwsiglib) |
| Firmware: Boot ROM | Free (BootROM) |
| Firmware Signing | Available, user-controlled |
| CPU Microcode | Not Present |
| Management Coprocessor: Firmware | Not Present |
| Network Interface: Internal Firmware | Not Present |
| Network Interface: Host-Loaded Firmware | Not Present |
| Security Coprocessor: Firmware | Not Present |
| Embedded Controller: Firmware | Not Present |
| Hardware: Board Electrical Schematic | Free |
| Hardware: Board PCB Design | Free |
| Hardware: CPU Instruction Set | Free (RISC-V) |
| Hardware: CPU/SoC Implementation | Free soft core, prop. FPGA (FPGA, VexRISC-V) |
| Hardware: CPU/SoC Synthesis Toolchain | Free (yosys/nextpnr) |
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