| Legend: | |||||||
|---|---|---|---|---|---|---|---|
| Free | Proprietary | Mixed Free and Proprietary | Proprietary, but fully disableable | Proprietary, but partial info/RE work available | Unknown | Undefined | None or N/A - feature/system not present |
| Property | Description |
|---|---|
| Manufacturer | Purism |
| Model | Librem 14 |
| Year | 2021 |
| Max CPU | Intel Core i7-10710U |
| Max RAM | 64GB 2x32GB DDR4 SODIMM |
| Image | credit to Purism (https://puri.sm/wp-content/uploads/2020/06/librem-14-main-header-image.png) |
| Software: User-Facing Environment | Free |
| Software: Operating System | Free |
| Software: Bootloader/Recovery | Free |
| Firmware: Persistent Privileged Code (e.g. x86 SMM) | Free (Coreboot) This is an FSP platform. However, with the exception of the (optional) FSP-I on certain very
recent Xeon platforms, no FSP components run in SMM. |
| Firmware: Late Boot/Payload | Free (EDK2, etc.) |
| Firmware: Platform Initialization | Mixed, Coreboot w/ prop. FSP-S |
| Firmware: Memory Initialization | Proprietary (FSP-M) |
| Firmware: Early Boot (incl. RoT) | Free (Coreboot) |
| Firmware: Boot ROM | None x86 CPUs don't have true "software" boot ROMs in mask ROM (such as those in many ARM SoCs).
Most x86 platforms map the firmware in SPI flash directly into address space at the reset vector, where it can be executed in-place. Prior to this, some early
initialization may be performed by the ROM microcode, or by coprocessors (such as the ME/PSP) if present. |
| Firmware Signing | For ME Only, Boot Guard disabled |
| CPU Microcode | Proprietary All current x86 CPUs use proprietary microcode, stored in mask ROM in the CPU itself.
Additional updates to this microcode can be temporarily loaded by firmware and/or the OS. |
| Management Coprocessor: Firmware | Proprietary, partially disabled (ME Gen4+) On ME version 12 and above (some Coffee Lake, all post-Coffee-Lake), sometimes called "IFWI ME" or "ME Generation 4" or later, module removal (as was done
with earlier MEs) is not currently known to be possible. However, the AltMeDisable ("HAP bit") can still be used on these MEs. |
| Communications Coprocessor: Internal Firmware | WLAN proprietary, but card is removable |
| Communications Coprocessor: Host-Loaded Firmware | Unnecessary with some cards (e.g. ath9k) |
| Security Coprocessor: Firmware | Proprietary, but use of it is optional (TPM) |
| Embedded Controller: Firmware | Free (Librem-EC) |
| Hardware: Board Electrical Schematic | Proprietary |
| Hardware: Board PCB Design | Proprietary |
| Hardware: CPU Instruction Set | Proprietary (x86_64) |
| Hardware: CPU/SoC Implementation | Proprietary (Intel Comet Lake) |
| Hardware: CPU/SoC Synthesis Toolchain | Proprietary |