Purism Librem 5
mobile/purism/librem5 (platform)
| Property | Description |
|---|---|
| Manufacturer | Purism |
| Model | Librem 5 |
| Year | 2020 |
| Max CPU | NXP i.MX 8M |
| Max RAM | 3GB |
| Image | Librem 5 (credit Purism) (https://puri.sm/wp-content/themes/wp-purism/images/librem-5/librem-5-side-angle-second.png) |
| Software: User-Facing Environment | Free |
| Software: Operating System | Free |
| Software: Bootloader/Recovery | Free (uboot) |
| Firmware: Trusted Execution Environment (e.g. x86 SMM) | Upstream Arm Trusted Firmware (BL31) Supported (imx8m) in upstream TF-A. |
| Firmware: Late Boot/Payload | Free (uboot) |
| Firmware: Platform Initialization | Free (uboot) |
| Firmware: Graphics Initialization | Free (uboot) |
| Firmware: Memory Initialization | Host-Loaded (DDR PHY blob) The DDR PHY used in the i.MX 8M requires its own
firmware, which must be loaded by the host at boot (typically by uboot's SPL). This blob is for the PHY itself (it is not executed on the host),
but it is still a proprietary binary which the host needs to handle. |
| Firmware: Early Boot (incl. RoT) | Free (uboot SPL) |
| Firmware: Boot ROM | Proprietary |
| Firmware Signing | Available, user-controlled (HAB) The i.MX 8M optionally supports High-Assurance Boot,
which can be fused with your own keys. |
| CPU Microcode | Not microcoded |
| Management Coprocessor: Firmware | Free (M4 firmware) Used at boot to load the DDR PHY firmware |
| Network Interface: Internal Firmware | Proprietary (Modem and WLAN) |
| Network Interface: Host-Loaded Firmware | Proprietary Early Librem 5s included the Redpine RS9116, which did not require host-loaded firmware (it loaded
its own firmware internally). Newer units use the SparkLAN WNFB-266AXI(BT), which does require host-loaded firmware. |
| Security Coprocessor: Firmware | Undefined |
| Embedded Controller: Firmware | Undefined |
| Hardware: Board Electrical Schematic | Published |
| Hardware: Board PCB Design | Part locations and layers only PDF files of PCB layers, showing trace placements, are
provided. However, the actual EDA source files are not. |
| Hardware: CPU Instruction Set | Proprietary (Arm) |
| Hardware: CPU/SoC Implementation | Proprietary |
| Hardware: CPU/SoC Synthesis Toolchain | Proprietary |
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