Dodoid's Computing Freedom Table

Shown configurations are the most-free currently attainable on each model and may not reflect that model's configuration as-sold.

Legend:
FreeProprietaryMixed Free and ProprietaryProprietary, but fully disableableProprietary, but partial info/RE work availableUnknownUndefinedNot Present

AMD Kabini System

template/16kb (platform)

Property Description
Manufacturer
AMD
Model
Kabini System
Year
Undefined
Max CPU
Undefined
Max RAM
Undefined
Image
AMD logo, credit AMD (http://1.bp.blogspot.com/-T9mmhti40Wo/UAFdCQjPZqI/AAAAAAAAAL4/6fxKBk2BZ8E/s1600/Amd+2.png)
Software: User-Facing Environment
Free
Software: Operating System
Free
Software: Bootloader/Recovery
Free
Firmware: Trusted Execution Environment (e.g. x86 SMM)
Undefined
Firmware: Late Boot/Payload
Undefined
Firmware: Platform Initialization
Undefined
Firmware: Graphics Initialization
Proprietary, some RE work (AtomBIOS)
The AtomBIOS VBIOS used for Trinity and Richland's integrated graphics is a proprietary Option ROM. However, some reverse-engineering is available from the openatom project, and in AtomBiosRunner.
Firmware: Memory Initialization
Undefined
Firmware: Early Boot (incl. RoT)
Undefined
Firmware: Boot ROM
None
x86 CPUs don't have true "software" boot ROMs in mask ROM (such as those in many ARM SoCs). Most x86 platforms map the firmware in SPI flash directly into address space at the reset vector, where it can be executed in-place. Prior to this, some early initialization may be performed by the ROM microcode, or by coprocessors (such as the ME/PSP) if present.
Firmware Signing
None
CPU Microcode
Proprietary
All current x86 CPUs use proprietary microcode, stored in mask ROM in the CPU itself. Additional updates to this microcode can be temporarily loaded by firmware and/or the OS.
Management Coprocessor: Firmware
Proprietary (SMU Firmware)
The SMU (System Management Unit) is a microcontroller inside AMD SoCs/APUs that handles low-level platform management: power, clocks, voltage, thermal control, power-gating, and related sensors and interrupts. The firmware for this microcontroller is a blob, included as a large array in the Family 15h AGESA source. Orochi platforms do not require this blob.
Network Interface: Internal Firmware
Undefined
Network Interface: Host-Loaded Firmware
Undefined
Security Coprocessor: Firmware
Undefined
Embedded Controller: Firmware
Undefined
Hardware: Board Electrical Schematic
Proprietary
Hardware: Board PCB Design
Proprietary
Hardware: CPU Instruction Set
Proprietary (x86_64)
Hardware: CPU/SoC Implementation
Proprietary (AMD Jaguar)
Hardware: CPU/SoC Synthesis Toolchain
Proprietary

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This page uses 1 DCFT template:


This page was generated at 14:44 UTC, Oct 07 2026, and reflects DCFT's data at that time.
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