Legend: | |||||||
---|---|---|---|---|---|---|---|
Free | Proprietary | Mixed Free and Proprietary | Proprietary, but fully disableable | Proprietary, but partial info/RE work available | Unknown | Undefined | None or N/A - feature/system not present |
Property | Description |
---|---|
Manufacturer | AMD |
Model | fam15h/fam10h System |
Image | AMD logo, credit AMD (http://1.bp.blogspot.com/-T9mmhti40Wo/UAFdCQjPZqI/AAAAAAAAAL4/6fxKBk2BZ8E/s1600/Amd+2.png) |
Software: User-Facing Environment | Free |
Software: Operating System | Free |
Software: Bootloader/Recovery | Free |
Firmware: Persistent Privileged Code (e.g. x86 SMM) | Undefined |
Firmware: Late Boot/Payload | Undefined |
Firmware: Memory Initialization | Undefined |
Firmware: Early Boot | Undefined |
Firmware: Boot ROM | Proprietary |
Firmware Signing | None |
CPU Microcode | Proprietary, RE possible on fam10h CPUs On K10-microarchitecture CPUs (e.g. fam10h Opterons of the 4100- and
6100-series, microcode is neither signed nor encrypted, and has been succesfully modified (modifying the behaviour of instructions to insert and trigger
proof-of-concept backdoors) as part of RUB-Sysstat's "Microcode" project (paper,
GitHub). On later CPUs (e.g. 6200/6300-series Opterons), microcode is encrypted. |
Management Coprocessor: Firmware | None |
Communications Coprocessor: Internal Firmware | Undefined |
Communications Coprocessor: Host-Loaded Firmware | Undefined |
Security Coprocessor: Firmware | Undefined |
Embedded Controller: Firmware | Undefined |
Hardware: Board Electrical Schematic | Proprietary |
Hardware: Board PCB Design | Proprietary |
Hardware: CPU Instruction Set | Proprietary (x86_64) |
Hardware: CPU/SoC Implementation | Proprietary (AMD K10/Bulldozer/Piledriver/Steamroller/Excavator) |
Hardware: CPU/SoC Synthesis Toolchain | Proprietary |