Dodoid's Computing Freedom Table

Shown configurations are the most-free currently attainable on each model and may not reflect that model's configuration as-sold.

Legend:
FreeProprietaryMixed Free and ProprietaryProprietary, but fully disableableProprietary, but partial info/RE work availableUnknownUndefinedNone or N/A - feature/system not present

Intel ME Gen2 System

template/megen2 (platform)

Property Description
Manufacturer
Intel
Model
ME Gen2 System
Year
Undefined
Max CPU
Undefined
Max RAM
Undefined
Image
Undefined
Software: User-Facing Environment
Undefined
Software: Operating System
Undefined
Software: Bootloader/Recovery
Undefined
Firmware: Persistent Privileged Code (e.g. x86 SMM)
Undefined
Firmware: Late Boot/Payload
Undefined
Firmware: Platform Initialization
Undefined
Firmware: Memory Initialization
Undefined
Firmware: Early Boot (incl. RoT)
Undefined
Firmware: Boot ROM
Undefined
Firmware Signing
ME only, theoretically defeatable
ME Gen2 is reportedly also vulnerable to CVE-2017-5705, which has been used on ME Gen3 to defeat Boot Guard. However, Deguard does not currently support ME Gen2, and no other practical application for CVE-2017-5705 is currently known.
CPU Microcode
Undefined
Management Coprocessor: Firmware
Proprietary, mostly disabled (ME Gen2)
On ME versions between 5 and 11 (Nehalem to Broadwell), sometimes called "ME Generation 2", nearly the entire ME image can be removed, leaving only two modules - ROMP and BUP - totaling 90 kB out of a normal 1.5 - 5 MB. With these modules removed, the ME remains in its BUP state and does not execute its kernel or normal ME functions, leaving it effectively disabled. The AltMeDisable ("HAP") bit can also be used on these MEs.
Communications Coprocessor: Internal Firmware
Undefined
Communications Coprocessor: Host-Loaded Firmware
Undefined
Security Coprocessor: Firmware
Undefined
Embedded Controller: Firmware
Undefined
Hardware: Board Electrical Schematic
Undefined
Hardware: Board PCB Design
Undefined
Hardware: CPU Instruction Set
Undefined
Hardware: CPU/SoC Implementation
Undefined
Hardware: CPU/SoC Synthesis Toolchain
Undefined

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This page was generated at 00:22 UTC, Nov 24 2025, and reflects DCFT's data at that time.
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