| Legend: | |||||||
|---|---|---|---|---|---|---|---|
| Free | Proprietary | Mixed Free and Proprietary | Proprietary, but fully disableable | Proprietary, but partial info/RE work available | Unknown | Undefined | None or N/A - feature/system not present |
| Property | Description |
|---|---|
| Manufacturer | Intel |
| Model | ME Gen3 (ME11) System |
| Year | Undefined |
| Max CPU | Undefined |
| Max RAM | Undefined |
| Image | Undefined |
| Software: User-Facing Environment | Undefined |
| Software: Operating System | Undefined |
| Software: Bootloader/Recovery | Undefined |
| Firmware: Persistent Privileged Code (e.g. x86 SMM) | Undefined |
| Firmware: Late Boot/Payload | Undefined |
| Firmware: Platform Initialization | Undefined |
| Firmware: Memory Initialization | Undefined |
| Firmware: Early Boot (incl. RoT) | Undefined |
| Firmware: Boot ROM | Undefined |
| Firmware Signing | ME only, can be defeated ME11 is vulnerable to
CVE-2017-5705, which allows arbitrary code execution
on the ME, defeating its firmware signing. This can be used to defeat Boot Guard using Deguard. |
| CPU Microcode | Undefined |
| Management Coprocessor: Firmware | Proprietary, partially disabled (ME Gen3) On ME version 11 specifically (Skylake, Kaby Lake, and some Coffee Lake), sometimes called "ME Generation 3", less of the ME firmware can be removed or
disabled while still leaving the system operational than on earlier versions. Approximately 300 kB of the original 2 - 7 MB binary, consisting of four regions
(rbe, kernel, syslib, and bup) are required. The AltMeDisable ("HAP") bit can also be used on these MEs. |
| Communications Coprocessor: Internal Firmware | Undefined |
| Communications Coprocessor: Host-Loaded Firmware | Undefined |
| Security Coprocessor: Firmware | Undefined |
| Embedded Controller: Firmware | Undefined |
| Hardware: Board Electrical Schematic | Undefined |
| Hardware: Board PCB Design | Undefined |
| Hardware: CPU Instruction Set | Undefined |
| Hardware: CPU/SoC Implementation | Undefined |
| Hardware: CPU/SoC Synthesis Toolchain | Undefined |