Lenovo ThinkPad 10/20/30-Series
template/tp102030 (platform)
| Property | Description |
|---|---|
| Manufacturer | Lenovo |
| Model | ThinkPad 10/20/30-Series |
| Year | Undefined |
| Max CPU | Undefined |
| Max RAM | Undefined |
| Image | Intel Logo, credit Intel (https://logodownload.org/wp-content/uploads/2014/04/intel-logo-1-1.png) |
| Software: User-Facing Environment | Free |
| Software: Operating System | Free |
| Software: Bootloader/Recovery | Free |
| Firmware: Persistent Privileged Code (e.g. x86 SMM) | Free (Coreboot) |
| Firmware: Late Boot/Payload | Free (SeaBIOS, etc.) |
| Firmware: Platform Initialization | Free (Coreboot) |
| Firmware: Memory Initialization | Free (Coreboot) |
| Firmware: Early Boot (incl. RoT) | Free (Coreboot) |
| Firmware: Boot ROM | None x86 CPUs don't have true "software" boot ROMs in mask ROM (such as those in many ARM SoCs).
Most x86 platforms map the firmware in SPI flash directly into address space at the reset vector, where it can be executed in-place. Prior to this, some early
initialization may be performed by the ROM microcode, or by coprocessors (such as the ME/PSP) if present. |
| Firmware Signing | ME only, theoretically defeatable ME Gen2 is reportedly also vulnerable to
CVE-2017-5705, which has been used on ME Gen3 to
defeat Boot Guard. However, Deguard does not currently support ME Gen2, and no other
practical application for CVE-2017-5705 is currently known. |
| CPU Microcode | Proprietary All current x86 CPUs use proprietary microcode, stored in mask ROM in the CPU itself.
Additional updates to this microcode can be temporarily loaded by firmware and/or the OS. |
| Management Coprocessor: Firmware | Proprietary, mostly disabled (ME Gen2) On ME versions between 5 and 11 (Nehalem to Broadwell), sometimes called "ME Generation 2", nearly the entire ME image can be removed, leaving only two modules - ROMP and BUP - totaling 90 kB out of a normal 1.5 - 5 MB.
With these modules removed, the ME remains in its BUP state and does not execute its kernel or normal ME functions, leaving it effectively disabled.
The AltMeDisable ("HAP") bit can also be used on these MEs. |
| Communications Coprocessor: Internal Firmware | WLAN proprietary, but card is removable |
| Communications Coprocessor: Host-Loaded Firmware | Unnecessary with some cards (e.g. ath9k) |
| Security Coprocessor: Firmware | Proprietary, but use of it is optional (TPM) |
| Embedded Controller: Firmware | Proprietary |
| Hardware: Board Electrical Schematic | Proprietary, but often available online |
| Hardware: Board PCB Design | Proprietary, but boardview often available |
| Hardware: CPU Instruction Set | Proprietary (x86_64) |
| Hardware: CPU/SoC Implementation | Proprietary (Intel Sandy Bridge) |
| Hardware: CPU/SoC Synthesis Toolchain | Proprietary |
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