Dodoid's Computing Freedom Table

Shown configurations are the most-free currently attainable on each model and may not reflect that model's configuration as-sold.

Legend:
FreeProprietaryMixed Free and ProprietaryProprietary, but fully disableableProprietary, but partial info/RE work availableUnknownUndefinedNot Present

Raptor Computing Systems Talos II Lite

server/raptorcs/talos2lite (platform-server)

Property Description
Manufacturer
Raptor Computing Systems
Model
Talos II Lite
Year
2018
Max CPU
1x IBM 02CY642 (22-core)
Raptor officially supports CPUs up to 190W, but claims that higher-wattage CPUs such as the 22-core, 225W 02WP493 are "likely-to-work".
Max RAM
1TB
8x128GB DDR4-2666 ECC RDIMM
Image
Raptor Talos II Lite - image credit Raptor CS (https://static.raptorcs.com/TL1MB1/images/boardlarge.png)
Software: User-Facing Environment
Free
Software: Operating System
Free
Software: Bootloader/Recovery
Free (Petitboot)
Firmware: Trusted Execution Environment (e.g. x86 SMM)
OPAL exists, but is OS-controlled
Skiboot provides a runtime services API named OPAL to the OS, but unlike x86 SMM, it does not run independently of the OS, and is guaranteed not to execute after the kernel starts unless the kernel calls it.
Firmware: Late Boot/Payload
Free (Skiroot)
Firmware: Platform Initialization
Free (Hostboot/Skiboot)
Firmware: Graphics Initialization
Free (skiroot Linux BMC init)
Firmware: Memory Initialization
Free (Hostboot)
Firmware: Early Boot (incl. RoT)
Free (Hostboot)
First code executed on the host POWER9 cores after the SBE sets up the system
Firmware: Boot ROM
Free (SBE OTPROM)
First instructions executed inside the CPU. Executed by the Self-Boot Engine (SBE) prior to loading its firmware from SEEPROM.
Firmware Signing
Available, user-controlled
CPU Microcode
Not microcoded
Management Coprocessor: Firmware
Multiple, free firmware
POWER9 contains multiple coprocessors used for various hardware management functions, including the Self-Boot Engine, Core Management Engines, Stop and Pstate General-Purpose Engines, I/O PPEs, and PB PPE. These are PPEs (Programmable PowerPC-lite Engines), small embedded PowerPC-derived cores designed for auxiliary management functions. Their firmware (SBE OTPROM+SEEPROM, CME firmware, various HCODE) is free.
Board Management Controller: Firmware
Free (OpenBMC)
Network Interface: Internal Firmware
Free (Project Ortega)
As of 2021, Project Ortega - reverse-engineered open-source firmware for the onboard Broadcom BCM5719 Ethernet controllers - is available.
Network Interface: Host-Loaded Firmware
Not Present
BCM5719 loads its own firmware.
Security Coprocessor: Firmware
No TPM included, likely proprietary if added
Embedded Controller: Firmware
Some EC-like functions on iCE40 FPGA
The iCE40 does not have a CPU core and does not execute firmware. However, some EC-like functionality is implemented in Raptor's gateware for it, which is free and built with a free synthesis toolchain.
Hardware: Board Electrical Schematic
Proprietary, but provided (solely) to customers
A board schematic is provided, exclusively to Raptor customers, on the DVD included with their products.
Hardware: Board PCB Design
Placement-only, for customers only
A map of component placements (apparently without routing information) is provided, exclusively to Raptor customers, on the DVD included with their products.
Hardware: CPU Instruction Set
Proprietary (POWER ISA)
Hardware: CPU/SoC Implementation
Proprietary (IBM)
Hardware: CPU/SoC Synthesis Toolchain
Proprietary

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