Intel Coreboot on Haswell System
template/haswellcoreboot (platform)
| Property | Description |
|---|---|
| Manufacturer | Intel |
| Model | Coreboot on Haswell System |
| Image | Intel Logo, credit Intel (https://logodownload.org/wp-content/uploads/2014/04/intel-logo-1-1.png) |
| Software: User-Facing Environment | Free |
| Software: Operating System | Free |
| Software: Bootloader/Recovery | Free |
| Firmware: Persistent Privileged Code (e.g. x86 SMM) | Free (Coreboot) |
| Firmware: Late Boot/Payload | Free (SeaBIOS, etc.) |
| Firmware: Memory Initialization | Free (Coreboot Haswell NRI) |
| Firmware: Early Boot | Free (Coreboot) |
| Firmware: Boot ROM | Proprietary |
| Firmware Signing | For ME Only |
| CPU Microcode | Proprietary |
| Management Coprocessor: Firmware | Proprietary, mostly disabled (ME Gen2) On ME versions between 5 and 11 (Nehalem to Broadwell), sometimes called "ME Generation 2", nearly the entire ME image can be removed, leaving only two modules - ROMP and BUP - totaling 90 kB out of a normal 1.5 - 5 MB.
With these modules removed, the ME remains in its BUP state and does not execute its kernel or normal ME functions, leaving it effectively disabled.
The AltMeDisable ("HAP bit") can be used on these MEs. |
| Communications Coprocessor: Internal Firmware | Undefined |
| Communications Coprocessor: Host-Loaded Firmware | Undefined |
| Security Coprocessor: Firmware | Undefined |
| Embedded Controller: Firmware | Undefined |
| Hardware: Board Electrical Schematic | Proprietary |
| Hardware: Board PCB Design | Proprietary |
| Hardware: CPU Instruction Set | Proprietary (x86_64) |
| Hardware: CPU/SoC Implementation | Proprietary (Intel Haswell) |
| Hardware: CPU/SoC Synthesis Toolchain | Proprietary |
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